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MAX17498A/max17498b/max17498c ac-dc and dc-dc peak-current-mode converters for flyback/boost applications maxim integrated products 1 typical operating circuit appears at end of data sheet. 19-6043; rev 0; 9/11 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX17498A.related . evaluation kit available general description the MAX17498A/max17498b/max17498c devices are current-mode fixed-frequency flyback/boost converters with a minimum number of external components. they contain all the control circuitry required to design wide- input-voltage isolated and nonisolated power supplies. the MAX17498A has its rising/falling undervoltage lock - out (uvlo) thresholds optimized for universal offline (85v ac to 265v ac) applications, while the max17498b/ max17498c support uvlo thresholds suitable to low- voltage dc-dc applications. the switching frequency of the MAX17498A/max17498c flyback converters is 250khz, while that of the max17498b flyback/boost converter is 500khz. these frequencies allow the use of tiny magnetic and filter components, resulting in compact, cost-effective power supplies. an en/uvlo input allows the user to start the power supply precisely at the desired input voltage, while also function - ing as an on/off pin. the ovi pin enables implementation of an input overvoltage-protection scheme that ensures that the converter shuts down when the dc input voltage exceeds the desired maximum value. the devices incorporate a flexible error amplifier and an accurate reference voltage (ref) to enable the end user to regulate both positive and negative outputs. programmable current limit allows proper sizing and protection of the primary switching fet. the max17498b supports a maxi - mum duty cycle of 92% and provides programmable slope compensation to allow optimization of control-loop performance. the MAX17498A/max17498c support a maximum duty cycle of 49%, and have fixed internal slope compensation for optimum control-loop performance. the devices provide an open-drain pgood pin that serves as a power-good indicator and enters the high-impedance state to indicate that the flyback /boost converter is in regula - tion. an ss pin allows programmable soft-start time for the flyback/boost converter. hiccup-mode overcurrent pro - tection and thermal shutdown are provided to minimize dissipation under overcurrent and overtemperature fault conditions. the devices are available in a space-saving, 16-pin (3mm x 3mm) tqfn package with 0.5mm lead spacing. benefits and features s peak current-mode flyback/boost converter s current-mode control provides excellent transient response s fixed switching frequency ? 250khz (MAX17498A/max17498c) ? 500khz (max17498b) s flexible error amplifier to regulate both positive and negative outputs s programmable soft-start to reduce input inrush current s programmable voltage or current soft-start s power-good signal (pgood) s reduced power dissipation under fault ? hiccup-mode overcurrent protection ? thermal shutdown with hysteresis s robust protection features ? flyback/boost programmable current limit ? input overvoltage protection s optimized loop performance ? programmable slope compensation for flyback /boost maximizes obtainable phase margin s high efficiency ? 175m i , 65v rated n-channel mosfet offers typical efficiency greater than 80% ? no current-sense resistor s optional spread spectrum s space-saving, 16-pin (3mm x 3mm) tqfn package applications front-end ac-dc power supplies for industrial applications (isolated and nonisolated) telecom power supplies wide-range dc input flyback /boost industrial power supplies for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 2 in to sgnd ............................................................ -0.3v to +40v en/uvlo to sgnd ......................................... -0.3v to in + 0.3v ovi to sgnd .............................................. -0.3v to v cc + 0.3v v cc to sgnd .......................................................... -0.3v to +6v ss, lim, ea-, ea+, comp, slope, ref to sgnd ........................................ -0.3v to (v cc + 0.3v) lx to sgnd ........................................................... -0.3v to +70v pgood to sgnd .................................................... -0.3v to +6v pgnd to sgnd .................................................... -0.3v to +0.3v continuous power dissipation (single-layer board) tqfn (derate 20.8mw/c above +70c) .................. 1700mw operating temperature range ........................ -40c to +125c storage temperature range ............................ -65c to +160c junction temperature (continuous) ................................ +150c lead temperature (soldering, 10s) ................................ +300c soldering temperature (reflow) ...................................... +260c absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics (v in = +15v, v en/uvlo = +2v, comp = open, c in = 1f, c vcc = 1f, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter conditions min typ max units input supply (v in ) in voltage range (v in ) MAX17498A 4.5 29 v max17498b/max17498c 4.5 36 in supply startup current under uvlo i instartup , v in < uvlo or en/uvlo = sgnd 22 36 a in supply current (i in ) switching, f sw = 250khz (MAX17498A/max17498c) 1.8 3 ma switching, f sw = 500khz (max17498b) 2.7 4.5 in boostrap uvlo rising threshold MAX17498A 19 20.5 22 v max17498b/ max17498c 3.9 4.15 4.4 in bootstrap uvlo falling threshold 3.65 3.95 4.25 v in clamp voltage en/uvlo = sgnd, i in = 1ma (MAX17498A) (note 3) 31 33.5 36 v linear regulator (v cc ) v cc output voltage range 6v < v in < 29v, 0ma < i vcc < 50ma 4.8 5 5.2 v v cc dropout volta ge v in = 4.5v, i vcc = 20ma 160 300 mv v cc current limit v cc = 0v, v in = 6v 50 100 ma enable (en/uvlo) en/uvlo threshold rising 1.18 1.23 1.28 v falling 1.11 1.17 1.21 en/uvlo input leakage current 0v < v en/uvlo < 1.5v, t a = +25 n c -100 0 +100 na www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 3 electrical characteristics (continued) (v in = +15v, v en/uvlo = +2v, comp = open, c in = 1f, c vcc = 1f, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter conditions min typ max units overvoltage protection (ovi) ovi threshold rising 1.18 1.23 1.28 v falling 1.11 1.17 1.21 ovi masking delay 2 s ovi input leakage current 0v < v ovi < 1.5v, t a = +25 n c -100 0 +100 na switching frequency and maximum duty cycle ( f sw and d max ) switching frequency MAX17498A/max17498c 235 250 265 khz max17498b 470 500 530 maximum duty cycle MAX17498A/max17498c 47.5 48.75 50 % max17498b 88 92 96 minimum controllable on time t onmin 110 ns soft-start (ss) ss set-point voltage 1.2 1.22 1.24 v ss pullup current v ss = 400mv 9 10 11 a ss peak current-limit-enable threshold 1.11 1.17 1.21 v error amplifier (ea+, ea-, and comp) ea+ input bias current v ea+ = 1.5v, t a = +25 n c -100 +100 na ea- input bias current v ea- = 1.5v, t a = +25 n c -100 +100 na error-amplifier open-loop voltage gain 90 db error-amplifier transconductance v comp = 2v, v lim = 1v 1.5 1.8 2.1 ms error-amplifier source current v comp = 2v, ea- < ea+ 80 120 210 a error-amplifier sink current v comp = 2v, ea- > ea+ 80 120 210 a current-sense transresistance 0.45 0.5 0.55 i internal switch dmos switch on-resistance (r dson ) i lx = 200ma 175 380 m i dmos peak current limit lim = 100k 1.62 1.9 2.23 a dmos runaway current limit lim = 100k 1.9 2.3 2.6 a lx leakage current v lx = 65v, t a = +25 n c 0.1 1 a current limit (lim) lim reference current 9 10 11 a peak switch current limit with lim open 0.39 0.45 0.54 a runaway switch current limit with lim open 0.39 0.5 0.6 a www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 4 note 2: all devices are 100% production tested at t a = +25 n c. limits over temperature are guaranteed by design. note 3: the MAX17498A is intended for use in universal input power supplies. the internal clamp circuit at in is used to prevent the bootstrap capacitor from changing to a voltage beyond the absolute maximum rating of the device when en/uvlo is low (shutdown mode). externally limit the maximum current to in (hence to clamp) to 2ma (max) when en/uvlo is low. electrical characteristics (continued) (v in = +15v, v en/uvlo = +2v, comp = open, c in = 1f, c vcc = 1f, t a = t j = -40c to +125c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter conditions min typ max units number of peak current-limit hits before hiccup timeout 8 # number of runaway current- limit hits before hiccup timeout 1 # overcurrent hiccup timeout 32 ms slope compensation (slope) slope pullup current 9 10 11 a slope-compensation resistor range max17498b 30 200 k i default slope-compensation ramp slope = open 100 mv/s power-good signal (pgood) pgood output-leakage current (off state) v pgood = 5v, t a = +25 n c -1 +1 a pgood output voltage (on state) i pgood = 10ma 0 0.4 v pgood higher threshold ea- rising 93.5 95 96.5 % pgood lower threshold ea- falling 90.5 92 93.5 % pgood delay after ea- reaches 95% regulation 4 ms thermal shutdown thermal-shutdown threshold temperature rising +160 n c thermal-shutdown hysteresis 20 n c www.datasheet.co.kr datasheet pdf - http://www..net/
maxim integrated products 5 ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c typical operating characteristics (v in = +15v, v en/uvlo = +2v, comp = open, c in = 1f, c vcc = 1f, t a = t j = -40c to +125c, unless otherwise noted. ) bootstrap uvlo wake-up level vs. temperature (MAX17498A) max17498 toc01 temperature ( c) bootstrap uvlo wake-up level (v) 120 100 80 60 40 20 0 -20 20.16 20.18 20.20 20.22 20.24 20.26 20.14 -40 in uvlo shutdown level vs. temperature max17498 toc03 in uvlo shutdown level (v) 120 100 -20 02 06 0 40 80 3.980 3.985 3.990 3.995 4.000 4.005 4.010 4.015 3.975 -40 temperature ( c) en / uvlo falling level vs. temperature max17498 toc05 temperature ( c) en / uvlo falling level (v) 120 100 80 60 40 20 0 -20 1.145 1.150 1.155 1.160 1.165 1.170 1.140 -40 max17498 toc02 temperature ( c) in uvlo wake-up level (v) in uvlo wake-up level vs. temperature (max17498b/max17498c) 3.95 4.00 4.05 4.10 4.15 3.90 120 100 80 60 40 20 0 -20 -40 max17498 toc04 temperature ( c) en / uvlo rising level (v) en / uvlo rising level vs. temperature 1.215 1.220 1.225 1.230 1.235 1.210 120 100 80 60 40 20 0 -20 -40 ovi rising level vs. temperature max17498 toc06 ovi rising level (v) 120 100 80 60 40 20 0 -20 1.215 1.220 1.225 1.210 -40 temperature ( c) www.datasheet.co.kr datasheet pdf - http://www..net/
maxim integrated products 6 ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c typical operating characteristics (continued) (v in = +15v, v en/uvlo = +2v, comp = open, c in = 1f, c vcc = 1f, t a = t j = -40c to +125c, unless otherwise noted. ) max17498 toc07 temperature ( c) ovi falling level (v) ovi falling level vs. temperature 1.140 1.145 1.150 1.155 1.160 1.135 120 100 80 60 40 20 0 -20 -40 in current during switching vs. temperature max17498 toc09 temperature ( c) in current during switching (ma) 120 100 80 60 40 20 0 -20 1.6 1.8 2.0 2.2 2.4 2.6 1.4 -40 en startup waveform max17498 toc11 v comp 1v/div v out 5v/div en/uvlo 5v/div 400s/div max17498 toc08 temperature ( c) in current under uvlo (a) in current under uvlo vs. temperature 22 24 26 28 30 20 120 100 80 60 40 20 0 -20 -40 lx and primary current waveform max17498 toc10 i pri 0.5a /div v lx 20v/div 1s/div en shutdown waveform max17498 toc12 v comp 1v/div v out 5v/div en/uvlo 5v/div 400s/div www.datasheet.co.kr datasheet pdf - http://www..net/
maxim integrated products 7 ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c typical operating characteristics (continued) (v in = +15v, v en/uvlo = +2v, comp = open, c in = 1f, c vcc = 1f, t a = t j = -40c to +125c, unless otherwise noted. ) peak current limit (i lim ) vs. r lim at room temperature max17498 toc13 r lim at room temperature (ki) peak current limit (ma) 70 60 40 50 20 30 10 200 400 600 800 1000 1200 1400 1600 1800 0 08 0 transient response for 50% load step on flyback output max17498 toc15 v out 200mv/div i load 500ma /div 2ms/div bode plot - (5v output at 24v input) max17498 toc17 gain 10db/div phase 36/div log (f) bw = 8.3khz pm = 63 peak current limit at r lim = 100k i vs. temperature at given r lim max17498 toc14 temperature at given r lim ( c) peak current limit at r lim (a) 120 100 80 60 40 20 0 -20 1.95 1.96 1.97 1.98 1.99 2.00 1.94 -40 short-circuit protection max17498 toc16 v out 500mv/div i pri 2a /div v lx 50v/div 10ms/div load current (a) efficiency (%) 1.4 1.2 0.8 1.0 0.4 0.6 0.2 0 efficiency graph at 24v input (flyback regulator) max17498 toc18 10 20 30 40 50 60 70 80 90 100 0 v dc = 310v www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 8 pin description pin configuration pin name function 1 en/uvlo enable/undervoltage-lockout pin. drive to > 1.23v to start the devices. to externally program the uvlo threshold of the input supply, connect a resistor-divider between input supply en/uvlo and sgnd. 2 v cc linear regulator output. connect input bypass capacitor of at least 1f from v cc to sgnd as close as possible to the ic. 3 ovi overvoltage comparator input. connect a resistor-divider between the input supply (ovi) and sgnd to set the input overvoltage threshold. 4 lim current-limit setting pin. connect a resistor between lim and sgnd to set the peak-current limit for nonisolated flyback converter. peak-current limit defaults to 500ma if unconnected. 5 slope slope compensation input pin. connect a resistor between slope and sgnd to the set slope- compensation ramp. connect to v cc for minimum slope compensation. see the programming slope compensation (slope) section. 6 ea- inverting input of the flexible error amplifier. connect to mid-point of resistor-divider from the positive terminal output to sgnd. 7 comp flexible error-amplifier output. connect the frequency-compensation network between comp and sgnd. 8 ss soft-start pin. connect a capacitor from ss to sgnd to set the soft-start time interval. 9 ea+ noninverting input of the flexible error amplifier. connect to ss to use 1.23v as the reference. 10, 12 n.c. no connection 11 ref internal 1.23v reference output pin. connect a 100pf capacitor from ref to sgnd. 15 16 14 13 6 5 7 v cc lim 8 en / uvlo ref ea+ n.c. 12 pgnd 4 12 11 9 lx ep (sgnd) in ss comp ea- slope + ovi n.c. 3 10 pgood tqfn-ep top view MAX17498A max17498b max17498c www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 9 pin description (continued) detailed description the MAX17498A offers a bootstrap uvlo wakeup level of 20v with a wide hysteresis of 15v (min) optimized for implementing an isolated and nonisolated universal (85v ac to 265v ac) offline single-switch flyback converter or telecom (36v to 72v) power supplies. the max17498b/max17498c offer a uvlo wakeup level of 4.4v and are well suited for low-voltage dc-dc flyback/ forward/boost power supplies. an internal 1% reference (1.23v) can be used to regulate the output down to 1.23v in nonisolated flyback, forward, and boost applications. additional semi-regulated outputs, if needed, can be generated by using additional secondary windings on the flyback/forward converter transformer. a flexible error amplifier and ref allow the end-user selection between regulating positive and negative outputs. the devices utilize peak current-mode control and exter - nal compensation for optimizing the loop performance for various inductors and capacitors. the devices include a cycle-by-cycle peak current limit and eight consecutive occurrences of current-limit event trigger hiccup mode, that protect external components by halting switching for a period of time (32ms). the devices also include voltage soft-start for nonisolated designs and current soft-start for isolated designs to allow monotonic rise of the output voltage. the voltage or current soft-start can be selected using the slope pin. see the block diagram for more information. input voltage range the MAX17498A has different rising and falling uvlo thresholds on the in pin than those of the max17498b/ max17498c. the thresholds for the MAX17498A are optimized for implementing power-supply startup schemes typically used for offline ac-dc power supplies. the MAX17498A is therefore well suited for opera - tion from the rectified dc bus in ac-dc power-supply applications typically encountered in front-end industrial power-supply applications. as such, the MAX17498A has no limitation on the maximum input voltage as long as the external components are rated suitably and the maximum operating voltages of the MAX17498A are respected. the MAX17498A can successfully be used in universal input-rectified (85v to 265v ac) bus applica - tions, rectified 3-phase dc bus applications, and tele - com (36v to 72v dc) applications. the max17498b/max17498c are intended for imple - menting a flyback (isolated and nonisolated) and boost converter with an on-board 65v rated n-channel mosfet. the in pin of the max17498b/max17498c has a maximum operating voltage of 36v. the max17498b/ max17498c implement rising and falling thresholds on the in pin that assume power-supply startup schemes, typical of lower voltage dc-dc applications, down to an input voltage of 4.5v dc. therefore, flyback converters with a 4.5v to 36v supply voltage range can be imple - mented with the max17498b/max17498c. internal linear regulator (v cc ) the internal functions and driver circuits are designed to operate from a 5v q 5% power-supply voltage. the devices have an internal linear regulator that is powered from the in pin and generates a 5v power rail. the output of the linear regulator is connected to the v cc pin and should be decoupled with a 2.2f capacitor to ground for stable operation. the v cc converter output supplies the operating current for the devices. the maximum operating voltage of the in pin is 29v for the MAX17498A and 36v for the max17498b/max17498c. pin name function 13 pgood open-drain output. pgood goes high when ea- is within 5% of the set point. pgood pulls low when ea- falls below 92% of its set-point value. 14 pgnd power ground for converter 15 lx external transformer/inductor connection for the converter 16 in internal linear regulator input. connect in to the input-voltage source. bypass in to pgnd with a 1f (min) ceramic capacitor. ep (sgnd) exposed pad. internally connected to sgnd. connect ep to a large copper plane at sgnd potential to provide adequate thermal dissipation. connect ep (sgnd) to pgnd at a single point. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 10 configuring the power stage (lx) the devices use an internal n-channel mosfet to imple - ment internal current sensing for current-mode control and overcurrent protection of the flyback/boost convert - er. to facilitate this, the drain of the internal nmosfet is connected to the source of the external mosfet in the MAX17498A high-input-voltage applications. the gate of the external mosfet is connected to the in pin. ensure by design that the in pin voltage does not exceed the maximum operating gate-voltage rating of the external mosfet. the external mosfet gate-source voltage is controlled by the switching action of the internal nmos - fet, while also sensing the source current of the exter - nal mosfet. in the max17498b/max17498c-based applications, the lx pin is directly connected to either the flyback/forward transformer primary winding or to the boost-converter inductor. maximum duty cycle the MAX17498A/max17498c operate at a maximum duty cycle of 49%. the max17498b offers a maximum duty cycle of 92% to implement both flyback and boost converters involving large input-to-output voltage ratios in dc-dc applications. power-good signal (pgood) the devices include a pgood signal that serves as a power-good signal to the system. pgood is an open-drain signal and requires a pullup resistor to the preferred supply voltage. the pgood signal monitors ea- and pulls high when ea- is 95% (typ) of its regulation value (1.23v). for isolated power supplies, pgood can - not serve as a power-good signal. figure 1. MAX17498A/max17498b/max17498c block diagram peak runaway pwm chipen control logic and driver clk v sum comp limint v cs comp ea+ ea- osc pok ldo 33v clamp (MAX17498A only ) chipen 1.23v 1.23v 1.23v 250mv slope lim ovi en/uvlo in v cc 5v, 50ma 10a decoder voltage ss current ss fixed slope variable slope 10a pgood block pgood ea- 8 peak or 1 runaway pgnd lx v cs v slope v sum ssdone ssdonef 1.17v 10a chipen hiccup ss MAX17498A max17498b max17498c www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 11 soft-start the devices implement soft-start operation for the flyback /boost converter. a capacitor connected to the ss pin programs the soft-start period for the flyback/ boost converter. the soft-start feature reduces the input inrush current. these devices allow the end user to select between voltage soft-start usually preferred in nonisolat - ed applications and current soft-start, which is useful in isolated applications to get a monotonic rise in the output voltage. see the programming soft-start of the flyback/ boost converter (ss) section. spread-spectrum factory option for emi-sensitive applications, a spread-spectrum- enabled version of the device can be requested from the factory. the frequency-dithering feature modulates the switching frequency by q 10% at a rate of 4khz. this spread-spectrum-modulation technique spreads the energy of switching-frequency harmonics over a wider band while reducing their peaks, helping to meet stringent emi goals. applications information startup voltage and input overvoltage- protection setting (en /uvlo, ovi) the devices en / uvlo pin serves as an enable /disable input, as well as an accurate programmable input uvlo pin. the devices do not commence startup operation unless the en/uvlo pin voltage exceeds 1.23v (typ). the devices turn off if the en/uvlo pin voltage falls below 1.17v (typ). a resistor-divider from the input dc bus to ground can be used to divide down and apply a fraction of the input dc voltage ( v dc ) to the en/uvlo pin. the values of the resistor-divider can be selected so that the en/uvlo pin voltage exceeds the 1.23v (typ) turn-on threshold at the desired input dc bus voltage. the same resistor-divider can be modified with an additional resistor (r ovi ) to implement input overvoltage protection in addition to the en/uvlo functionality as shown in figure 2 . when voltage at the ovi pin exceeds 1.23v (typ), the devices stop switching and resume switching opera - tions only if voltage at the ovi pin falls below 1.17v (typ). for given values of startup dc input voltage (v start ), and input overvoltage-protection voltage (v ovi ), the resistor values for the divider can be calculated as fol - lows, assuming a 24.9k i resistor for r ovi : ovi en ovi start v r r 1k v ?? = ?? ?? ?? where r ovi is in k i while v start and v ovi are in volts. start sum ovi en v r r r 1k 1.23 ?? = + ?? ?? ?? ?? ?? where r en and r ovi are in ki while v ovi is in volts. in universal ac input applications, r sum might need to be implemented as equal resistors in series (r dc1 , r dc2 , r dc3 ) so that voltage across each resistor is limited to its maximum operation voltage. sum dc1 dc1 dc1 r rrr k 3 = = = ? for low-voltage dc-dc applications based on the max17498b/max17498c, a single resistor can be used in the place of r sum , as the voltage across it is approximately 40v. figure 2. programming en/uvlo and ovi ovi r ovi r en r sum v dc r dc3 r dc2 r dc1 en/uvlo MAX17498A max17498b max17498c www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 12 startup operation the MAX17498A is optimized for implementing an offline single-switch flyback converter and has a 20v in uvlo wake-up level with hysteresis of 15v (min). in offline appli - cations, a simple cost-effective rc startup circuit is used. when the input dc voltage is applied, the startup resis - tor (r start ) charges the startup capacitor (c start ), causing the voltage at the in pin to increase towards the wake-up in uvlo threshold (20v typ). during this time, the MAX17498A draws a low startup current of 20a (typ) through r start . when the voltage at in reaches the wake-up in uvlo threshold, the MAX17498A commenc - es switching operations and drives the internal n-channel mosfet whose drain is connected to the lx pin. in this condition, the max17948a draws 1.8ma current from c start , in addition to the current required to switch the gate of the external nmosfet. since this current cannot be supported by the current through r start , the volt - age on c start starts to drop. when suitably configured, as shown in figure 10 , the external nmosfet is switched by the lx pin and the flyback/forward con- verter generates an output voltage (v out ) bootstrapped to the in pin through the diode (d2). if v out exceeds the sum of 5v and the drop across d2 before the volt - age on c start falls below 5v, then the in voltage is sustained by v out , allowing the MAX17498A to continue operating with energy from v out . the large hysteresis (15v typ) of the MAX17498A allows for a small startup capacitor (c start ). the low startup curent (20a typ) allows the use of a large start resistor (r start ), thus reducing power dissipation at higher dc bus voltages. figure 3 shows the typical rc startup scheme for the MAX17498A. r start might need to be implemented as equal, multiple resistors in series (r in1 , r in2 , and r in3 ) to share the applied high dc voltage in offline applications so that the voltage across each resistor is limited to the maximum continuous operating-voltage rating. r start and c start can be calculated as: gate sw ss start in 6 q ft c i f 10 10 ?? ?? = + ?? ?? ?? ?? where i in is the supply current drawn at the in pin in ma, q gate is the gate charge of the external nmosfet used in nc, f sw is the switching frequency of the converter in hz, and t ss is the soft-start time programmed for the flyback /forward converter in ms. see the programming soft-start of the flyback /boost converter (ss) section. ( ) start start start v 10 50 rk 1c ? = ? + ?? ?? where c start is the startup capacitor in f. for designs that cannot accept power dissipation in the startup resistors at high dc input voltages in offline appli - cations, the startup circuit can be set up with a current source instead of a startup resistor as shown in figure 4 . figure 3. MAX17498A rc-based startup circuit figure 4. MAX17498A current source-based startup circuit r start r in3 v out v dc v dc v out in lx v cc c vcc c start d2 d1 r in2 r in1 c out MAX17498A ldo r start r in3 r isrc in v out v dc v dc v out d1 in d2 lx v cc c vcc c start r in2 r in1 c out MAX17498A ldo www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 13 the startup capacitor (c start ) can be calculated as: gate sw ss start in 6 qft c i f 10 10 ?? ?? = + ?? ?? ?? ?? where i in is the supply current drawn at the in pin in ma, q gate is the gate charge of the external mosfet used in nc, f sw is the switching frequency of the converter in khz, and t ss is the soft-start time programmed for the flyback converter in ms. resistors r sum and r isrc can be calculated as: start sum beq1 isrc v rm 10 v rm 70 = ? = ? the in uvlo wakeup threshold of the max17498b/ max17498c is set to 3.9v (typ) with a 200mv hyster - esis, optimized for low-voltage dc-dc applications down to 4.5v. for applications where the input dc voltage is low enough (e.g., 4.5v to 5.5v dc) that the power loss incurred to supply the operating current of the max17498b/max17498c can be tolerated, the in pin is directly connected to the dc input, as shown in figure 5 . in the case of higher dc input voltages (e.g., 16v to 32v dc), a startup circuit, such as that shown in figure 6 , can be used to minimize power dissipation in the startup circuit. in this startup scheme, the transistor (q1) supplies the switching current until a bias winding nb comes up. the resistor (r z ) can be calculated as: z inmin r 9 (v 6.3) k = ?? where v inmin is the minimum input dc voltage. programming soft-start of the flyback/boost converter (ss) the soft-start period in the voltage soft-start scheme of the devices can be programmed by selecting the value of the capacitor connected from the ss pin to gnd. the capacitor c ss can be calculated as: ss ss c 8.13 t nf = where t ss is expressed in ms. the soft-start period in the current soft-start scheme depends on the load at the output and the soft-start capacitor. programming output voltage the devices incorporate a flexible error amplifier that allows regulating to both the positive and negative outputs. the positive output voltage of the converter can be programmed by selecting the correct values for the resistor-divider connected from v out , the fly - back /boost output to ground, with the midpoint of the divider connected to the ea- pin ( figure 7 ). with r b selected in the range of 20k i to 50k i , r u can be calculated as: out ub v r r 1k 1.23 ?? = ?? ?? ?? where r b is in k i . figure 5. max17498b/max17498c typical startup circuit with in connected directly to dc input figure 6. max17498b/max17498c typical startup circuit with bias winding to turn off q1 and reduce power dissipation v dc v out in lx np ns v cc in d1 c in c out c vcc max17498b max17498c ldo v dc v out lx np ns in c out max17498b max17498c in nb v cc c vcc c in d2 d1 r z z d1 6.3v ldo q1 www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 14 the negative output voltage of the converter can be programmed by selecting the correct values for the resistor-divider connected from v out , the flyback /boost output to ref with the midpoint of the divider connected to the ea+ pin ( figure 8 ). with r1 selected in the range of 20k i to 50k i , r u can be calculated as: out v r2 r1 k 1.23 ?? =? ?? ?? where r1 is in k i . current-limit programming (lim) the devices include a robust overcurrent-protection scheme that protects the device under overload and short-circuit conditions. for the flyback/boost con - verter, the devices include a cycle-by-cycle peak current limit that turns off the driver whenever the current into the lx pin exceeds an internal limit that is programmed by the resistor connected from the lim pin to gnd. the devices include a runaway current limit that protects the device under high-input-voltage short- circuit conditions when there is insufficient output voltage available to restore the inductor current built up dur - ing the on period of the flyback/boost converter. either eight consecutive occurrences of the peak current- limit event or one occurrence of the runaway current limit trigger a hiccup mode that protects the converter by immediately suspending switching for a period of time (t rstart ). this allows the overload current to decay due to power loss in the converter resistances, load, and the output diode of the flyback/boost converter before soft-start is attempted again. the resistor at the lim pin for a desired current limit (i pk ) can be calculated as: lim pk r 50 i k =? where i pk is expressed in amperes. for a given peak-current-limit setting, the runaway current limit is typically 20% higher. the peak current- limit-triggered hiccup operation is disabled until the end of soft-start, while the runaway current-limit-triggered hic - cup operation is always disabled. programming slope compensation (slope) since the MAX17498A/max17498c operate at a maxi - mum duty cycle of 49%, in theory they do not require slope compensation for preventing subharmonic instability that occurs naturally in continuous-mode peak-current-mode- controlled converters operating at duty cycles greater than 50%. in practice, the MAX17498A/max17498c require a minimum amount of slope compensation to provide stable, jitter-free operation. the MAX17498A/ max17498c allow the user to program this default value of slope compensation simply by con necting the slope pin to v cc . it is recommended that discontinuous-mode designs also use this minimum amount of slope compen - sation to provide noise immunity and jitter-free operation. the max17498b flyback/boost converter can be designed to operate in either discontinuous mode or to enter into the continuous-conduction mode at a spe - cific heavy-load condition for a given dc input voltage. in the continuous-conduction mode, the flyback/boost converter needs slope compensation to avoid subhar - monic instability that occurs naturally over all specified load and line conditions in peak-current-mode-controlled converters operating at duty cycles greater than 50%. a minimum amount of slope signal is added to the sensed current signal even for converters operating below 50% duty to provide stable, jitter-free operation. the slope pin allows the user to program the necessary slope compensation by setting the value of the resistor (r slope ) connected from slope pin to ground. e slope s rk 10 = ? where the slope (s e ) is expressed in volts per microseconds. figure 7. programming the positive output voltage figure 8. programming the negative output voltage r b r u ea- v out MAX17498A max17498b max17498c r1 r ea- ea+ ea- ref r2 v out MAX17498A max17498b max17498c www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 15 error amplifier, loop compensation, and power-stage design of the flyback/boost converter the flyback/boost converter requires proper loop compen - sation to be applied to the error-amplifier output to achieve stable operation. the goal of the compensator design is to achieve the desired closed-loop bandwidth and sufficient phase margin at the crossover frequency of the open-loop gain-transfer function of the converter. the error amplifier provided in the devices is a transconductance amplifier. the compensation network used to apply the necessary loop compensation is shown in figure 9 . the flyback/boost converter can be used to implement the following converters and operating modes: ? nonisolated flyback converter in discontinuous- conduction mode (dcm flyback) ? nonisolated flyback converter in continuous- conduction mode (ccm flyback) ? boost converter in discontinuous-conduction mode (dcm boost) ? boost converter in continuous-conduction mode (ccm boost) calculations for loop-compensation values (r z , c z , and c p ) for these converter types and design procedures for power- stage components are detailed in the following sections. dcm flyback primary-inductance selection in a dcm flyback converter, the energy stored in the primary inductance of the flyback transformer is ideally delivered entirely to the output. the maximum primary- inductance value for which the converter remains in discontinuous mode at all operating conditions can be calculated as: ( ) 2 inmin max primax out d out sw v d 0.4 l (v v ) i f + where d max is 0.35 for the MAX17498A/max17498c and 0.7 for the max17498b, v d is the voltage drop of the out - put rectifier diode on the secondary winding, and f sw is the switching frequency of the power converter. choose the primary inductance value to be less than l primax . duty-cycle calculation the accurate value of the duty cycle (d new ) for the selected primary inductance (l pri ) can be calculated using the following equation: pri out d out sw new inmin 2.5 l (v v ) i f d v + = turns-ratio calculation (ns /np) transformer turns ratio (k = ns/np) can be calculated as: out d max inmin max (v v ) (1 d ) k vd + ? = peak /rms-current calculation the transformer manufacturer needs rms current values in the primary and secondary to design the wire diameter for the different windings. peak current calculations are useful in setting the current limit. use the following equa - tions to calculate the primary and secondary peak and rms currents. maximum primary peak current: inmin new pripeak pri sw vd i lf = maximum primary rms current: new prirms pripeak d ii 3 = maximum secondary peak current: pripeak secpeak i i k = maximum secondary rms current: prirms secrms i i k = for current-limit setting, the peak current can be calculated as: lim pripeak i i 1.2 = primary rcd snubber selection ideally, the external n-channel mosfet experiences a drain-source voltage stress equal to the sum of the input voltage and reflected voltage across the primary figure 9. error-amplifier compensation network r z comp c z c p MAX17498A max17498b max17497c www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 16 winding during the off period of the nmosfet. in prac - tice, parasitic inductances and capacitors in the circuit, such as leakage inductance of the flyback transformer, cause voltage overshoot and ringing. snubber circuits are used to limit the voltage overshoots to safe levels within the voltage rating of the external nmosfet. the snubber capacitor can be calculated using the following equation: 22 lk pripeak snub 2 out 2l i k c v = where l lk is the leakage inductance that can be obtained from the transformer specifications (usually 1% to 2% of the primary inductance). the power to be dissipated in the snubber resistor is calculated using the following formula: 2 snub lk pripeak sw p 0.833 l i f = the snubber resistor can be calculated based on the following equation: 2 out snub 2 snub 6.25 v r pk = the voltage rating of the snubber diode is: out dsnub inmax v v v 2.5 k ?? = + ?? ?? output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application so that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response out out response c sw it c v 0.33 1 t () ff = ? ?+ where i step is the load step, t response is the response time of the controller, d v out is the allowable output- voltage deviation, and f c is the target closed-loop cross - over frequency. f c is chosen to be 1/10 the switching frequency (f sw ) . for the flyback converter, the output capacitor supplies the load current when the main switch is on, and therefore, output-voltage ripple is a function of load current and duty cycle. use the following equation to calculate the output-capacitor ripple: 2 new pripeak out cout pripeak sw out d i ki v 2i f c ?? ? ?? ?? ?? ?= where i out is load current and d new is the duty cycle at minimum input voltage. input-capacitor selection the MAX17498A is optimized to implement offline ac-dc converters. in such applications, the input capac - itor must be selected based on either the ripple due to the rectified line voltage, or based on holdup-time requirements. holdup time can be defined as the time period over which the power supply should regulate its output voltage from the instant the ac power fails. the max17498b /max17498c are useful in implementing low-voltage dc-dc applications where the switching- frequency ripple must be used to calculate the input capacitor. in both cases, the capacitor must be sized to meet rms current requirements for reliable operation. capacitor selection based on switching ripple (max17498b/max17498c): for dc-dc applications, x7r ceramic capacitors are recommended due to their stability over the operating temperature range. the esr and esl of a ceramic capacitor are relatively low, so the ripple voltage is dominated by the capacitive com - ponent. for the flyback converter, the input capacitor supplies the current when the main switch is on. use the following equation to calculate the input capacitor for a specified peak-to-peak input switching ripple (v in_rip ): ( ) 2 new pripeak new in sw in_rip d i 1 0.5 d c 2f v ?? ? ?? = capacitor selection based on rectified line-voltage ripple (MAX17498A): for the flyback converter, the input capacitor supplies the input current when the diode rectifier is off. the voltage discharge (v in_rip ), due to the input average current, should be within the limits speci - fied: pripeak new in ripple in_rip 0.5 i d c fv = where f ripple , the input ac ripple frequency equal to the supply frequency for half-wave rectification, is two times the ac supply frequency for full-wave rectification. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 17 capacitor selection based on hold-up time requirements (MAX17498A): for a given output power (p holdup ) that needs to be delivered during hold-up time (t holdup ), dc bus voltage at which the ac supply fails (v infail ), and the minimum dc bus voltage at which the converter can regulate the output voltages (v inmin ) , the input capacitor (c in ) is estimated as: holdup holdup in 22 infail inmin 3p t c (v v ) = ? the input capacitor rms current can be calculated as: ( ) 2 inmin max incrms sw pri 0.6 v d i fl = external mosfet selection mosfet selection criteria includes the maximum drain voltage, peak /rms current in the primary, and the maximum allowable power dissipation of the package without exceeding the junction temperature limits. the voltage seen by the mosfet drain is the sum of the input voltage, the reflected secondary voltage on the transformer primary, and the leakage inductance spike. the mosfets absolute maximum v ds rating must be higher than the worst-case drain voltage: out d dsmax inmax vv v v 2.5 k ?? + ?? =+ ?? ?? ?? ?? the drain current rating of the external mosfet is selected to be greater than the worst-case peak current-limit setting. secondary-diode selection secondary-diode-selection criteria includes the maxi - mum reverse voltage, average current in the secondary, reverse recovery time, junction capacitance, and the maximum allowable power dissipation of the package. the voltage stress on the diode is the sum of the output voltage and the reflected primary voltage. the maximum operating reverse-voltage rating must be higher than the worst-case reverse voltage: secdiode inmax out v 1.25 (k v v ) = + the current rating of the secondary diode should be selected so that the power loss in the diode (given as the product of forward-voltage drop and the average diode current) should be low enough to ensure that the junction temperature is within limits. this necessitates that the diode current rating be in the order of 2 x i out to 3 x i out . select fast-recovery diodes with a recovery time less than 50ns, or schottky diodes with low junction capacitance. error-amplifier compensation design the loop compensation values are calculated as: 2 sw out out p z pri sw 0.1 f 1 vi f r 450 2l f ?? ?? ?? + ?? ?? ?? ?? = where: out p out out z zp p z sw i f vc 1 c rf 1 c rf = = = f sw is the switching frequency of the devices and can be obtained from the electrical characteristics section. ccm flyback transformer turns-ratio calculation (k = ns /np) the transformer turns ratio can be calculated using the following formula: ( ) out d max inmin max v v (1 d ) k vd + ? = where d max is the duty cycle assumed at minimum input (0.35 for MAX17498A/max17498c and 0.7 for max17498b). primary-inductance calculation calculate the primary inductance based on the ripple: ( ) out d nom pri out sw v v (1 d ) k l 2i f + ? = ? where d nom , the nominal duty cycle at nominal operat ing dc input voltage (v innom ), is given as: ( ) ( ) out d nom innom out d v vk d v v vk + = ?? + + ?? the output current, down to which the flyback converter should operate in ccm, is determined by selection of the fraction a in the above primary inductance formula. for example, a should be selected as 0.15 so that the converter operates in ccm down to 15% of the maximum www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 18 output load current. since the ripple in the primary current waveform is a function of duty cycle and is maximum-at- maximum dc input voltage, the maximum (worst-case) load current, down to which the converter operates in ccm, occurs at maximum operating dc input voltage. v d is the forward drop of the selected output diode at maximum output current. peak/rms-current calculation rms current values in the primary and secondary are needed by the transformer manufacturer to design the wire diameter for the different windings. peak-current calculations are useful in setting the current limit. use the following equations to calculate the primary and second - ary peak and rms currents. maximum primary peak current: out inmin max pripeak max pri sw ik vd i 1d 2l f ?? ?? = + ?? ?? ? ?? ?? maximum primary rms current: ( ) 22 pripeak pri pripeak pri prirms max i ii i i 3 d +? ? ? = where d i pri is the ripple current in the primary current waveform, and is given by: inmin max pri pri sw vd i lf ?? ?= ?? ?? maximum secondary peak current: pripeak secpeak i i k = maximum secondary rms current: ( ) 22 secpeak sec secpeak sec secrms max i ii i i 3 1d +? + ? = ? where d i sec is the ripple current in the secondary current waveform, and is given by: inmin max sec pri sw vd i l fk ?? ?= ?? ?? current-limit setting the peak current can be calculated as: lim pripeak i i 1.2 = primary rcd snubber selection the design procedure for primary rcd snubber selection is identical to that outlined in the dcm flyback section. output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application so that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response out out response c sw it c v 0.33 1 t () ff = ? ?+ where i step is the load step, t response is the response time of the controller, d v out is the allowable output- voltage deviation, and f c is the target closed-loop crossover frequency. f c is chosen to be less than 1/5 the worst-case (lowest) rhp zero frequency (f rhp ). the right half-plane zero frequency is calculated as: 2 max out zrhp 2 max pri out (1 d ) v f 2d li k ? = for the ccm flyback converter, the output capacitor sup - plies the load current when the main switch is on, and therefore, the output-voltage ripple is a function of load current and duty cycle. use the following equation to estimate the output-voltage ripple: out max cout sw out id v fc ?= input-capacitor selection the design procedure for input-capacitor selection is identical to that outlined in the dcm flyback section. external mosfet selection the design procedure for external mosfet selection is identical to that outlined in the dcm flyback section. secondary-diode selection the design procedure for secondary-diode selection is identical to that outlined in the dcm flyback section. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 19 error-amplifier compensation design in the ccm flyback converter, the primary inductance and the equivalent load resistance introduces a right half-plane zero at the following frequency: 2 max out zrhp 2 max pri out (1 d ) v f 2d li k ? = the loop-compensation values are calculated as: 2 out rhp z max p 225 i f r1 (1 d ) 5 f ?? = + ?? ? ?? where f p , the pole due to output capacitor and load, is given by: max out p out out (1 d ) i f 2c v + = the above selection sets the loop-gain crossover fre quency (f c , where the loop gain equals 1) equal to 1/5 the right half-plane zero frequency: zrhp c f f 5 with the control-loop zero placed at the load pole fre quency: z zp 1 c 2r f = with the high-frequency pole placed at 1/2 the switching frequency: p z sw 1 c rf = dcm boost in a dcm boost converter, the inductor current returns to zero in every switching cycle. energy stored during the on time of the main switch is delivered entirely to the load in each switching cycle. inductance selection the design procedure starts with calculating the boost converters input inductor so that it oper - ates in dcm at all operating line and load conditions. the critical inductance required to maintain dcm operation is calculated as: ( ) 2 out inmin inmin in 2 out out sw v v v 0.4 l iv f ?? ? ?? ?? where v inmin is the minimum input voltage. peak /rms-current calculation to set the current limit, the peak current in the inductor can be calculated as: lim pk pk out inmin out pk inmin swmin i i 1.2 where i is given by: 2 (v v ) i i lf = ?? ? = ?? ?? l inmin is the minimum value of the input inductor, taking into account tolerance and saturation effects. f swmin is the minimum switching frequency for the max17498b/ max17498c from the electrical characteristics section. output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application so that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response out out response c sw it c v 0.33 1 t () ff = ? ?+ where i step is the load step, t response is the response time of the controller, d v out is the allowable output- voltage deviation, and f c is the target closed-loop cross - over frequency. f c is chosen to be 1/10 the switching frequency (f sw ). for the boost converter, the output capacitor supplies the load current when the main switch is on, and therefore, the output-voltage ripple is a func - tion of duty cycle and load current. use the following equation to calculate the output-capacitor ripple: out in pk cout inmin out i li v vc ?= www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 20 input-capacitor selection the value of the required input ceramic capacitor can be calculated based on the ripple allowed on the input dc bus. the input capacitor should be sized based on the rms value of the ac current handled by it. the calculations are: out in inmin swmin max 3.75 i c v f (1 d ) ?? = ?? ? ?? the capacitor rms can be calculated as: pk cin_rms i i 23 = error-amplifier compensation design the loop-compensation values for the error amplifier can now be calculated as: ( ) dc m z dc sw g g 10 c g 10 nf 2f = = where g dc , the dc gain of the power stage, is given as: 2 out inmin sw out in dc 2 out inmin out out out out inmin z out z out inmin 8 (v v ) f v l g (2v v ) i v c (v v ) r i c (2v v ) ? = ? ? = ? where v inmin is the minimum operating input voltage and i out is the maximum load current: out p z c esr c r = slope compensation in theory, the dcm boost converter does not require slope compensation for stable operation. in practice, the converter needs a minimum amount of slope for good noise immunity at very light loads. the minimum slope is set for the devices by connecting the slope pin to the v cc pin. output-diode selection the voltage rating of the output diode for the boost converter ideally equals the output voltage of the boost converter. in practice, parasitic inductances and capacitances in the circuit interact to produce volt - age overshoot during the turn-off transition of the diode that occurs when the main switch turns on. the diode rating should therefore be selected with the necessary margin to accommodate this extra voltage stress. a voltage rating of 1.3 x v out provides the necessary design margin in most cases. the current rating of the output diode should be selected so that the power loss in the diode (given as the product of forward-voltage drop and the average diode current) is low enough to ensure that the junction temperature is within limits. this necessitates that the diode current rating be in the order of 2 x i out to 3 x i out . select fast- recovery diodes with a recovery time less than 50ns or schottky diodes with low junction capacitance. internal mosfet rms current calculation the voltage stress on the internal mosfet, whose drain is connected to lx, ideally equals the sum of the output voltage and the forward drop of the output diode. in practice, voltage overshoot and ringing occur due to the action of circuit parasitic elements during the turn-off transition. the maximum rating of the devices internal n-channel mosfet is 65v, making it possible to design boost converters with output voltages up to 48v and suffi - cient margin for voltage overshoot and ringing. the rms current into lx is useful in estimating the conduction loss in the internal nmosfet, and is given as: 3 pk ins sw lx_rms inmin i lf i 3v = where i pk is the peak current calculated at the lowest operating input voltage (v inmin ). ccm boost in a ccm boost converter, the inductor current does not return to zero during a switching cycle. since the max17498c implements a nonsynchronous boost con - verter, the inductor current enters dcm operation at load currents below a critical value equal to 1/2 the peak-to- peak ripple in the inductor current. inductor selection the design procedure starts with calculating the boost converters input inductor at nominal input voltage for a ripple in the inductor current equal to 30% of the maxi - mum input current: in in out sw v d (1 d) l 0.3 i f ? = where d is the duty cycle calculated as: out d in out d ds out v vv d v v (r i ) +? = +? v d is the voltage drop across the output diode of the boost converter at maximum output current, and r ds is the resistance of the internal n-channel mosfet at lx in the on state. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 21 peak/rms-current calculation to set the current limit, the peak current in the inductor and internal nmosfet can be calculated as: out max max out pk inmin swmin max out out pk max inmin swmin v d (1 d ) i i l f (1 d) 1.2 for d 0.5 0.25 v i i 1.2 for d 0.5 l f (1 d) ?? ? = + ?? ? ?? ?? = + ?? ? ?? d max , the maximum duty cycle, is obtained by substitut - ing the minimum input operating voltage (v inmin ) in the equation above for duty cycle. l inmin is the minimum value of the input inductor taking into account tolerance and saturation effects. f swmin is the minimum switch - ing frequency for the max17498c from the electrical characteristics section. output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application, such that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response outf out response c sw it c v 0.33 1 t () ff = ? ?+ where i step is the load step, t response is the response time of the controller, d v out is the allowable output-voltage deviation, and f c is the target closed- loop crossover frequency. f c is chosen to be 1/10 the switching frequency (f sw ). for the boost converter, the output capacitor supplies the load current when the main switch is on, and therefore, the output-voltage ripple is a function of duty cycle and load current. use the following equation to calculate the output-capacitor ripple: out max cout out sw id v cf ?= input-capacitor selection the input ceramic capacitor value required can be cal - culated based on the ripple allowed on the input dc bus. the input capacitor should be sized based on the rms value of the ac current handled by it. the calculations are: out in inmin sw max 3.75 i c v f (1 d ) ?? = ?? ? ?? the input-capacitor rms current can be calculated as: lin cin_rms i i 23 ? = where: out max max lin max inmin swmin out lin max inmin swmin v d (1 d ) i for d 0.5 lf 0.25 v i for d 0.5 lf ?? ? ?= < ?? ?? ?? ?= ?? ?? error-amplifier compensation design the loop-compensation values for the error amplifier can now be calculated as: 2 out out min z outmin in 250 v c (1 d ) r il ? = where d min is the duty cycle at the highest operating input voltage and i outmin is the minimum load current: out out z out z p sw z vc c 2i r 1 c fr = = slope-compensation ramp the slope required to stabilize the converter at duty cycles greater than 50% can be calculated as: out inmin e in 0.5 (0.82 v v ) s v per s l ? = where l in is in h. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 22 output-diode selection the design procedure for output-diode selection is iden - tical to that outlined in the dcm boost section. internal mosfet rms current calculation the voltage stress on the internal mosfet, whose drain is connected to lx, ideally equals the sum of the output voltage and the forward drop of the output diode. in practice, voltage overshoot and ringing occur due to the action of circuit parasitic elements during the turn-off transition. the maximum rating of the internal n-channel mosfet of the devices is 65v, making it possible to design boost converters with output voltages up to 48v and sufficient margin for voltage overshoot and ringing. the rms current into lx is useful in estimating the conduction loss in the internal nmosfet, and is given as: out max lxrms max id i (1 d ) = ? where d max is the duty cycle at the lowest operating input voltage and i out is the maximum load current. thermal considerations it should be ensured that the junction temperature of the devices does not exceed +125c under the operating con - ditions specified for the power supply. the power dissipat - ed in the devices to operate can be calculated using the following equation: in in in p vi = where v in is the voltage applied at the in pin and i in is operating supply current. the internal n-channel mosfet experiences conduction loss and transition loss when switching between on and off states. these losses are calculated as: ( ) 2 conduction lxrms dsonlx transition inmax pk r f sw p ir p 0.5 v i t t f = = + where t r and t f are the rise and fall times of the internal nmosfet in ccm operation. in dcm operation, since the switch current starts from zero, only t f exists and the transition-loss equation changes to: transition inmax pk f sw p 0.5 v i t f = additional loss occurs in the system in every switch - ing cycle due to energy stored in the drain-source capacitance of the internal mosfet being lost when the mosfet turns on and discharges the drain-source capacitance voltage to zero. this loss is estimated as: 2 cap ds dsmax sw p 0.5 c v f = the total power loss in the devices can be calculated from the following equation: loss in conduction transition cap p pp p p =+ ++ the maximum power that can be dissipated in the devices is 1666mw at +70c temperature. the power- dissipation capability should be derated as the tem - perature rises above +70c at 21mw/c. for a multilayer board, the thermal-performance metrics for the package are given below: ja jc 48c / w 10c / w = = the junction-temperature rise of the devices can be estimated at any given maximum ambient temperature (t amax ) from the following equation: ( ) jmax amax ja loss tt p = + if the application has a thermal-management system that ensures that the exposed pad of the devices is maintained at a given temperature (t epmax ) by using proper heatsinks, then the junction-temperature rise of the devices can be estimated at any given maximum ambient temperature from the following equation: ( ) jmax epmax jc loss tt p = + www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 23 layout, grounding and bypassing all connections carrying pulsed currents must be very short and as wide as possible. the inductance of these connections must be kept to an absolute minimum due to the high di/dt of the currents in high-frequency switching power converters. this implies that the loop areas for forward and return pulsed currents in various parts of the circuit should be minimized. additionally, small-current loop areas reduce radiated emi. similarly, the heatsink of the main mosfet presents a dv/dt source, and therefore, the surface area of the mosfet heatsink should be minimized as much as possible. ground planes must be kept as intact as possible. the ground plane for the power section of the converter should be kept separate from the analog ground plane, except for a connection at the least noisy section of the power ground plane, typically the return of the input filter capacitor. the negative terminal of the filter capacitor, ground return of the power switch, and current-sensing resistor must be close together. pcb layout also affects the thermal performance of the design. a number of thermal vias that connect to a large ground plane should be provided under the exposed pad of the part for effi - cient heat dissipation. for a sample layout that ensures first-pass success, refer to the max17498b evaluation kit layout available at www.maxim-ic.com . for universal ac input designs, follow all applicable safety regulations. offline power supplies can require ul, vde, and other similar agency approvals. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 24 figure 10. MAX17498A typical application example (smart meter power supply) typical application circuits pgood n.c. n.c. pgnd in in ep lim ss r11 49.9ki c12 47nf v cc slope v cc c4 2.2f r5 82ki r6 20.5ki en/uvlo ovi r4 2.2mi r3 2.2mi r2 2.2mi v in r15 3mi r14 3mi 3mi r12 3mi in c6 0.47f, 35v r23 10ki n2 fqt1n80tf c7 2.2f, 50v v out2 q1 bc849cw d2 rb160m-60tr v in c2 l1 1h r8 1.2mi c1 0.1f, 630v d1 s5kc-13- f line neutral 85v ac to 265v ac r7 1.2mi r1 10i lx d4 rf101l2ste2 5 d3 us1k-tp d5 bzt52c18-7f n1 fqd1n80tm c8 0.1f, 25v c18 141f, 6.3v d6 c14 10f, 16v c15 10f, 16v c10 2.2f, 250v r16 100ki, 0.5w r20 10 ki t1 c16 open v out2 in v out1 v out1 -3.3v, 2a v out2 8.7v, 0.3a pgnd MAX17498A c3 100pf ref ref v out1 ea+ r10 133ki r22 49.3ki ref ea- r17 1ki comp c9 22f c11 47pf r9 15ki www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 25 figure 11. max17498b typical application example (plc supply) pgnd pgood c4 4.7f, 50v c5 0.22f, 50v ref ea+ ss r4 20ki ovi pgnd en/uvl o r5 10ki en/uvlo ovi r3 348ki v in v fb v in c1 47f, 63v 18v to 36v input pgnd v in c2 4.7f, 50v in u1 c9 47f lx d2 d1 c12 22f, 16v c13 22f, 16v c3 33f, 50v r1 7.5ki t1 c14 22f, 16v 5v, 1.5a output v out v out gnd max17498b c6 22f, 16v v cc v cc c10 100pf ref lim r6 75ki r9 10ki r11 15ki comp ea- slope r7 open pgood r12 10ki v cc v cc r15 1ki r20 30.3ki r4 open r19 10ki r16 open c15 4.7f r18 20ki c16 33pf 1 2 3 u3 r17 open c18 open r13 511i u2 v fb v out www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 26 figure 12. max17498c typical application example n.c. n.c. pgnd in slope v cc r7 25ki r8 49.9ki en /uvlo ovi r6 481ki v in v in v in pgnd c2 0.1f c1 47f 10.8v to 13.2v dc max17498c c8 100pf ref ref ss ea+ ep lx in d1 ss26-tp v out 24v, 0.2a c7 4.7 f, 35v l1 15 h pgood r9 10ki v cc pgood lim ss r1 75ki c3 47nf ss r2 12ki c4 2.2f v cc ea- r3 9.92ki r4 184ki v out comp r5 15ki c6 47pf c5 10f www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c maxim integrated products 27 package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. ordering information + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. ** future productcontact factory for availability. part temp range pin-package description MAX17498A ate+ -40c to +125c 16 tqfn-ep* 250khz, offline flyback/forward converter max17498b ate+** -40c to +125c 16 tqfn-ep* 500khz, low-voltage dc-dc flyback/boost converter max17498c ate+** -40c to +125c 16 tqfn-ep* 250khz, low-voltage dc-dc flyback/forward converter package type package code outline no. land pattern no. 16 tqfn-ep t1633+5 21-0136 90-0032 www.datasheet.co.kr datasheet pdf - http://www..net/
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 28 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. ac-dc and dc-dc peak-current-mode converters for flyback/boost applications MAX17498A/max17498b/max17498c revision history revision number revision date description pages changed 0 9/11 initial release www.datasheet.co.kr datasheet pdf - http://www..net/

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